1. Technical Field
The present invention relates generally to data communications. More particularly, the present invention relates to circuitry for high-speed data links.
2. Description of the Background Art
High-speed serial data links are used to communicate data between devices in a system. Market demands for transceiver data rates for high-speed serial data links continue to increase.
Interpolator-based clock and data recovery (iCDR) has gained wide acceptance for high-speed serial data links. However, iCDR circuits are prone to substantial quantization error due to its digital architecture. The random nature of this type of jitter leads to a substantial amount of eye closure.